Requirements: ·BSEE/CS required ·Must be proficient in verilog ·Must have strong software background (C/C++ programming, low level hardware interface programming) ·Strong scripting skills required, Perl/TCL/sed/awk ·Familiar with GNU software (gcc, make, config) ·Familiar with ARM Development Suit (ADS), at least 1 year experience in using ADS ·At least 3 years direct experience in verifying complex SoC design ·Hands-on experience in using Cadence NCSIM simulator ·HVL experience, such as SystemC, Vera, Specman, TestBuilder, is highly desirable ·Good analytical and problem-solving skills ·Good analytical and problem-solving skills ·Good written and spoken English ·Good communication skills and able to work both independently and in a team
