Job Requirements:
1)BSEE with at least 5 years (MSEE with 3 years) experience in ASIC design
2)Verilog and C coding experience
3)Proficient in using standard tools, including Cadence NCSIM, Synopsys DC/PT, Novas Debussy
4)Must be knowledgeable in MPEG2 decompression, previous experience in MPEG2 decoder design is highly desirable
5)Knowledge of HVL, such as SystemC, Vera, Specman or TestBuilder, is a big plus
6)Good perl/tcl scripting skills
7)Good written and spoken English
8)Good communication skills and able to work both independently and in a team